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Espressif Systems /ESP32-P4 /PARL_IO /RX_GENRL_CFG

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Interpret as RX_GENRL_CFG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RX_GATING_EN)RX_GATING_EN 0RX_TIMEOUT_THRES0 (RX_TIMEOUT_EN)RX_TIMEOUT_EN 0 (RX_EOF_GEN_SEL)RX_EOF_GEN_SEL

Description

Parallel RX general configuration register.

Fields

RX_GATING_EN

Set this bit to enable the clock gating of output rx clock.
RX_TIMEOUT_THRES

Configures threshold of timeout counter.
RX_TIMEOUT_EN

Set this bit to enable timeout function to generate error eof.
RX_EOF_GEN_SEL

Configures the DMA eof generated mechanism. 1’b0: eof generated by data bit length. 1’b1: eof generated by external enable signal.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data